LCOV - code coverage report
Current view:
top level
-
drivers/gpu/drm/display
- drm_dp_helper.c
(
source
/ functions)
Hit
Total
Coverage
Test:
coverage.info
Lines:
0
1002
0.0 %
Date:
2023-08-24 13:40:31
Functions:
0
112
0.0 %
Function Name
Hit count
__128b132b_channel_eq_delay_us
0
__8b10b_channel_eq_delay_us
0
__8b10b_clock_recovery_delay_us
0
__drm_dp_link_train_channel_eq_delay
0
__read_delay
0
dp_colorimetry_get_name
0
drm_dp_128b132b_cds_interlane_align_done
0
drm_dp_128b132b_eq_interlane_align_done
0
drm_dp_128b132b_lane_channel_eq_done
0
drm_dp_128b132b_lane_symbol_locked
0
drm_dp_128b132b_link_training_failed
0
drm_dp_128b132b_read_aux_rd_interval
0
drm_dp_aux_crc_work
0
drm_dp_aux_get_crc
0
drm_dp_aux_init
0
drm_dp_aux_register
0
drm_dp_aux_unregister
0
drm_dp_bw_code_to_link_rate
0
drm_dp_channel_eq_ok
0
drm_dp_clock_recovery_ok
0
drm_dp_downstream_420_passthrough
0
drm_dp_downstream_444_to_420_conversion
0
drm_dp_downstream_debug
0
drm_dp_downstream_id
0
drm_dp_downstream_is_tmds
0
drm_dp_downstream_is_type
0
drm_dp_downstream_max_bpc
0
drm_dp_downstream_max_dotclock
0
drm_dp_downstream_max_tmds_clock
0
drm_dp_downstream_min_tmds_clock
0
drm_dp_downstream_mode
0
drm_dp_downstream_rgb_to_ycbcr_conversion
0
drm_dp_dpcd_access
0
drm_dp_dpcd_probe
0
drm_dp_dpcd_read
0
drm_dp_dpcd_read_link_status
0
drm_dp_dpcd_read_phy_link_status
0
drm_dp_dpcd_write
0
drm_dp_dsc_sink_line_buf_depth
0
drm_dp_dsc_sink_max_slice_count
0
drm_dp_dsc_sink_supported_input_bpcs
0
drm_dp_dump_access
0
drm_dp_get_adjust_request_pre_emphasis
0
drm_dp_get_adjust_request_voltage
0
drm_dp_get_adjust_tx_ffe_preset
0
drm_dp_get_pcon_max_frl_bw
0
drm_dp_get_phy_test_pattern
0
drm_dp_get_quirks
0
drm_dp_i2c_do_msg
0
drm_dp_i2c_drain_msg
0
drm_dp_i2c_functionality
0
drm_dp_i2c_retry_count
0
drm_dp_i2c_xfer
0
drm_dp_link_rate_to_bw_code
0
drm_dp_link_train_channel_eq_delay
0
drm_dp_link_train_clock_recovery_delay
0
drm_dp_lttpr_count
0
drm_dp_lttpr_link_train_channel_eq_delay
0
drm_dp_lttpr_link_train_clock_recovery_delay
0
drm_dp_lttpr_max_lane_count
0
drm_dp_lttpr_max_link_rate
0
drm_dp_lttpr_pre_emphasis_level_3_supported
0
drm_dp_lttpr_voltage_swing_level_3_supported
0
drm_dp_pcon_configure_dsc_enc
0
drm_dp_pcon_convert_rgb_to_ycbcr
0
drm_dp_pcon_dsc_bpp_incr
0
drm_dp_pcon_dsc_max_slice_width
0
drm_dp_pcon_dsc_max_slices
0
drm_dp_pcon_enc_is_dsc_1_2
0
drm_dp_pcon_frl_configure_1
0
drm_dp_pcon_frl_configure_2
0
drm_dp_pcon_frl_enable
0
drm_dp_pcon_frl_prepare
0
drm_dp_pcon_hdmi_frl_link_error_count
0
drm_dp_pcon_hdmi_link_active
0
drm_dp_pcon_hdmi_link_mode
0
drm_dp_pcon_is_frl_ready
0
drm_dp_pcon_pps_default
0
drm_dp_pcon_pps_override_buf
0
drm_dp_pcon_pps_override_param
0
drm_dp_pcon_reset_frl_config
0
drm_dp_phy_name
0
drm_dp_psr_setup_time
0
drm_dp_read_channel_eq_delay
0
drm_dp_read_clock_recovery_delay
0
drm_dp_read_desc
0
drm_dp_read_downstream_info
0
drm_dp_read_dpcd_caps
0
drm_dp_read_extended_dpcd_caps
0
drm_dp_read_lttpr_common_caps
0
drm_dp_read_lttpr_phy_caps
0
drm_dp_read_lttpr_regs.isra.10
0
drm_dp_read_sink_count
0
drm_dp_read_sink_count_cap
0
drm_dp_remote_aux_init
0
drm_dp_send_real_edid_checksum
0
drm_dp_set_phy_test_pattern
0
drm_dp_set_subconnector_property
0
drm_dp_start_crc
0
drm_dp_stop_crc
0
drm_dp_subconnector_type
0
drm_dp_vsc_sdp_log
0
drm_edp_backlight_disable
0
drm_edp_backlight_enable
0
drm_edp_backlight_init
0
drm_edp_backlight_probe_max
0
drm_edp_backlight_probe_state
0
drm_edp_backlight_set_enable
0
drm_edp_backlight_set_level
0
lock_bus
0
trylock_bus
0
unlock_bus
0
Generated by:
LCOV version 1.14